#if defined(TSINGMA_MX)

DEF_D(CtcDpTxCtlInterruptFatal, 0)
DEF_F(EpeScheduleInterruptFatal, 0, 1)
DEF_F(NetTxInterruptFatal, 1, 1)

DEF_D(CtcDpTxCtlInterruptFatal, 1)
DEF_F(EpeScheduleInterruptFatal, 0, 0)
DEF_F(NetTxInterruptFatal, 1, 0)

DEF_D(CtcDpRxCtlInterruptFatal, 2)
DEF_F(NetRxInterruptFatal, 0, 1)

DEF_D(CtcDpRxCtlInterruptFatal, 3)
DEF_F(NetRxInterruptFatal, 0, 0)

DEF_D(CtcQMgrCtlInterruptFatal, 4)
DEF_F(QMgrDeqL4CosInterruptFatal, 0, 0)
DEF_F(QMgrDeqL3InterruptFatal, 1, 0)
DEF_F(QMgrDeqL2InterruptFatal, 2, 0)
DEF_F(QMgrDeqL1InterruptFatal, 3, 0)
DEF_F(QMgrDeqL0InterruptFatal, 4, 0)
DEF_F(QMgrDeqChanInterruptFatal, 5, 0)
DEF_F(QMgrQWriteInterruptFatal, 6, 0)
DEF_F(QMgrMsgMiscInterruptFatal, 7, 0)
DEF_F(QMgrMsgMemInterruptFatal, 8, 2)
DEF_F(QMgrMsgMemInterruptFatal, 9, 1)
DEF_F(QMgrMsgMemInterruptFatal, 10, 0)
DEF_F(QMgrLinkListInterruptFatal, 11, 0)
DEF_F(QMgrErmInterruptFatal, 12, 0)

DEF_D(CtcKeyCtlInterruptFatal, 5)
DEF_F(LpmTcamInterruptFatal, 0, 0)
DEF_F(FlowHashInterruptFatal, 1, 0)
DEF_F(FibHashHost0InterruptFatal, 2, 0)
DEF_F(FibEngineInterruptFatal, 3, 0)
DEF_F(FibAccInterruptFatal, 4, 0)
DEF_F(DynamicFibKeyInterruptFatal, 5, 0)
DEF_F(DsAgingInterruptFatal, 6, 0)

DEF_D(CtcIpeTxCtlInterruptFatal, 6)
DEF_F(FlowAccIpeInterruptFatal, 0, 0)
DEF_F(FlowAccEpeInterruptFatal, 1, 0)
DEF_F(FlowAccAdInterruptFatal, 2, 0)
DEF_F(LinkAggInterruptFatal, 3, 0)
DEF_F(IpeFwdInterruptFatal, 4, 0)
DEF_F(GlobalStatsInterruptFatal, 5, 0)
DEF_F(EcmpDlbInterruptFatal, 6, 0)

DEF_D(CtcIpeRxCtlInterruptFatal, 7)
DEF_F(ProgramAclLtidTcamInterruptFatal, 0, 0)
DEF_F(IpeAclInterruptFatal, 1, 0)
DEF_F(FlexDecodeInterruptFatal, 2, 1)
DEF_F(FlexDecodeInterruptFatal, 3, 0)
DEF_F(UserIdHashInterruptFatal, 4, 0)
DEF_F(FlexDecodeInterruptFatal, 5, 2)
DEF_F(OamHashInterruptFatal, 6, 0)
DEF_F(IpePktProcInterruptFatal, 7, 0)
DEF_F(IpeLkupMgrInterruptFatal, 8, 0)
DEF_F(IpeIntfMapInterruptFatal, 9, 0)
DEF_F(IpeHdrAdjInterruptFatal, 10, 0)
DEF_F(EfdInterruptFatal, 11, 0)

DEF_D(CtcEpeCtlInterruptFatal, 8)
DEF_F(EpePktRewriteInterruptFatal, 0, 0)
DEF_F(EpeHdrEditInterruptFatal, 1, 0)
DEF_F(LmStatsInterruptFatal, 2, 0)
DEF_F(EpeAclOamInterruptFatal, 3, 0)
DEF_F(EpeNextHopInterruptFatal, 4, 0)
DEF_F(EpeHdrProcInterruptFatal, 5, 0)
DEF_F(EpeHdrAdjInterruptFatal, 6, 0)

DEF_D(CtcBsrCtlInterruptFatal, 9)
DEF_F(MetFifoShareInterruptFatal, 0, 0)
DEF_F(MetFifoProcInterruptFatal, 1, 0)
DEF_F(BufStoreProcInterruptFatal, 2, 0)
DEF_F(BufStoreDpCtlInterruptFatal, 3, 1)
DEF_F(BufStoreDpCtlInterruptFatal, 4, 0)
DEF_F(BufRetrvDPInterruptFatal, 5, 1)
DEF_F(BufRetrvDPInterruptFatal, 6, 0)
DEF_F(BufRetrvShareInterruptFatal, 7, 0)

DEF_D(CtcAdEditCtlInterruptFatal, 10)
DEF_F(FibHashHost1InterruptFatal, 0, 0)
DEF_F(UserIdHashSclKeyCmpInterruptFatal, 1, 0)
DEF_F(EgrSclHashInterruptFatal, 2, 0)
DEF_F(DynamicMiscKeyInterruptFatal, 3, 0)
DEF_F(MplsHashInterruptFatal, 4, 0)
DEF_F(DynamicEditInterruptFatal, 5, 0)
DEF_F(GemPortHashInterruptFatal, 6, 0)
DEF_F(DynamicAdInterruptFatal, 7, 0)

DEF_D(CtcMiscCtlInterruptFatal, 11)
DEF_F(TsEngineInterruptFatal, 0, 0)
DEF_F(SpnOamInterruptFatal, 1, 0)
DEF_F(CpuMacProcInterruptFatal, 2, 0)
DEF_F(HMacEngineInterruptFatal, 3, 0)
DEF_F(OamProcInterruptFatal, 4, 0)
DEF_F(OamParserInterruptFatal, 5, 0)
DEF_F(OamFwdInterruptFatal, 6, 0)
DEF_F_NULL( 7)
DEF_F_NULL( 8)


//-to_do
DEF_D(PbCtlLeftInterruptFatal, 12)
DEF_D(PbCtlLeftInterruptFatal, 13)
DEF_D(CpuMapInterruptFatal, 14)
DEF_D(PcieIntfInterruptFatal, 15)
DEF_D(DmaCtlInterruptFatal, 16)


DEF_D(CtcCsCtlInterruptNormal, 0)
DEF_F_NULL(0)
DEF_F_NULL(1)
DEF_F_NULL(2)
DEF_F_NULL(3)
DEF_F_NULL(4)
DEF_F_NULL(5)
DEF_F_NULL(6)
DEF_F_NULL(7)
DEF_F_NULL(8)
DEF_F_NULL(9)
DEF_F_NULL(10)
DEF_F_NULL(11)
DEF_F_NULL(12)
DEF_F_NULL(13)
DEF_F_NULL(14)
DEF_F_NULL(15)
DEF_F_NULL(16)
DEF_F_NULL(17)
DEF_F_NULL(18)
DEF_F_NULL(19)
DEF_F_NULL(20)
DEF_F_NULL(21)
DEF_F_NULL(22)
DEF_F_NULL(23)
DEF_F_NULL(24)
DEF_F_NULL(25)
DEF_F_NULL(26)
DEF_F_NULL(27)
DEF_F_NULL(28)
DEF_F_NULL(29)
DEF_F_NULL(30)
DEF_F_NULL(31)
DEF_F(McPcsX8LanesInterruptNormal, 32, 3)
DEF_F(McMacInterruptNormal, 33, 7)
DEF_F(McHataInterruptNormal, 34, 7)

DEF_D(CtcCsCtlInterruptNormal, 1)
DEF_F_NULL(0)
DEF_F_NULL(1)
DEF_F_NULL(2)
DEF_F_NULL(3)
DEF_F_NULL(4)
DEF_F_NULL(5)
DEF_F_NULL(6)
DEF_F_NULL(7)
DEF_F_NULL(8)
DEF_F_NULL(9)
DEF_F_NULL(10)
DEF_F_NULL(11)
DEF_F_NULL(12)
DEF_F_NULL(13)
DEF_F_NULL(14)
DEF_F_NULL(15)
DEF_F_NULL(16)
DEF_F_NULL(17)
DEF_F_NULL(18)
DEF_F_NULL(19)
DEF_F_NULL(20)
DEF_F_NULL(21)
DEF_F_NULL(22)
DEF_F_NULL(23)
DEF_F_NULL(24)
DEF_F_NULL(25)
DEF_F_NULL(26)
DEF_F_NULL(27)
DEF_F_NULL(28)
DEF_F_NULL(29)
DEF_F_NULL(30)
DEF_F_NULL(31)
DEF_F(McPcsX8LanesInterruptNormal, 32, 2)
DEF_F(McMacInterruptNormal, 33, 6)
DEF_F(McHataInterruptNormal, 34, 6)

DEF_D(CtcHsCtlInterruptNormal, 2)
DEF_F_NULL(0)
DEF_F_NULL(1)
DEF_F_NULL(2)
DEF_F_NULL(3)
DEF_F_NULL(4)
DEF_F_NULL(5)
DEF_F_NULL(6)
DEF_F_NULL(7)
DEF_F_NULL(8)
DEF_F_NULL(9)
DEF_F_NULL(10)
DEF_F_NULL(11)
DEF_F_NULL(12)
DEF_F_NULL(13)
DEF_F_NULL(14)
DEF_F_NULL(15)
DEF_F_NULL(16)
DEF_F_NULL(17)
DEF_F_NULL(18)
DEF_F_NULL(19)
DEF_F_NULL(20)
DEF_F_NULL(21)
DEF_F_NULL(22)
DEF_F_NULL(23)
DEF_F_NULL(24)
DEF_F_NULL(25)
DEF_F_NULL(26)
DEF_F_NULL(27)
DEF_F_NULL(28)
DEF_F_NULL(29)
DEF_F_NULL(30)
DEF_F_NULL(31)
DEF_F_NULL(32)
DEF_F_NULL(33)
DEF_F_NULL(34)
DEF_F_NULL(35)
DEF_F_NULL(36)
DEF_F_NULL(37)
DEF_F_NULL(38)
DEF_F_NULL(39)
DEF_F_NULL(40)
DEF_F_NULL(41)
DEF_F_NULL(42)
DEF_F_NULL(43)
DEF_F_NULL(44)
DEF_F_NULL(45)
DEF_F_NULL(46)
DEF_F_NULL(47)
DEF_F_NULL(48)
DEF_F_NULL(49)
DEF_F_NULL(50)
DEF_F_NULL(51)
DEF_F_NULL(52)
DEF_F_NULL(53)
DEF_F_NULL(54)
DEF_F_NULL(55)
DEF_F_NULL(56)
DEF_F_NULL(57)
DEF_F_NULL(58)
DEF_F_NULL(59)
DEF_F_NULL(60)
DEF_F_NULL(61)
DEF_F_NULL(62)
DEF_F_NULL(63)
DEF_F_NULL(64)
DEF_F_NULL(65)
DEF_F_NULL(66)
DEF_F_NULL(67)
DEF_F(McPcsX16LanesInterruptNormal, 68, 3)
DEF_F(McpuInterruptNormal, 69, 4)
DEF_F(McMacInterruptNormal, 70, 5)
DEF_F(McHataInterruptNormal, 71, 5)

DEF_D(CtcHsCtlInterruptNormal, 3)
DEF_F_NULL(0)
DEF_F_NULL(1)
DEF_F_NULL(2)
DEF_F_NULL(3)
DEF_F_NULL(4)
DEF_F_NULL(5)
DEF_F_NULL(6)
DEF_F_NULL(7)
DEF_F_NULL(8)
DEF_F_NULL(9)
DEF_F_NULL(10)
DEF_F_NULL(11)
DEF_F_NULL(12)
DEF_F_NULL(13)
DEF_F_NULL(14)
DEF_F_NULL(15)
DEF_F_NULL(16)
DEF_F_NULL(17)
DEF_F_NULL(18)
DEF_F_NULL(19)
DEF_F_NULL(20)
DEF_F_NULL(21)
DEF_F_NULL(22)
DEF_F_NULL(23)
DEF_F_NULL(24)
DEF_F_NULL(25)
DEF_F_NULL(26)
DEF_F_NULL(27)
DEF_F_NULL(28)
DEF_F_NULL(29)
DEF_F_NULL(30)
DEF_F_NULL(31)
DEF_F_NULL(32)
DEF_F_NULL(33)
DEF_F_NULL(34)
DEF_F_NULL(35)
DEF_F_NULL(36)
DEF_F_NULL(37)
DEF_F_NULL(38)
DEF_F_NULL(39)
DEF_F_NULL(40)
DEF_F_NULL(41)
DEF_F_NULL(42)
DEF_F_NULL(43)
DEF_F_NULL(44)
DEF_F_NULL(45)
DEF_F_NULL(46)
DEF_F_NULL(47)
DEF_F_NULL(48)
DEF_F_NULL(49)
DEF_F_NULL(50)
DEF_F_NULL(51)
DEF_F_NULL(52)
DEF_F_NULL(53)
DEF_F_NULL(54)
DEF_F_NULL(55)
DEF_F_NULL(56)
DEF_F_NULL(57)
DEF_F_NULL(58)
DEF_F_NULL(59)
DEF_F_NULL(60)
DEF_F_NULL(61)
DEF_F_NULL(62)
DEF_F_NULL(63)
DEF_F_NULL(64)
DEF_F_NULL(65)
DEF_F_NULL(66)
DEF_F_NULL(67)
DEF_F(McPcsX16LanesInterruptNormal, 68, 2)
DEF_F(McpuInterruptNormal, 69, 3)
DEF_F(McMacInterruptNormal, 70, 4)
DEF_F(McHataInterruptNormal, 71, 4)

DEF_D(CtcCsCtlInterruptNormal, 4)
DEF_F_NULL(0)
DEF_F_NULL(1)
DEF_F_NULL(2)
DEF_F_NULL(3)
DEF_F_NULL(4)
DEF_F_NULL(5)
DEF_F_NULL(6)
DEF_F_NULL(7)
DEF_F_NULL(8)
DEF_F_NULL(9)
DEF_F_NULL(10)
DEF_F_NULL(11)
DEF_F_NULL(12)
DEF_F_NULL(13)
DEF_F_NULL(14)
DEF_F_NULL(15)
DEF_F_NULL(16)
DEF_F_NULL(17)
DEF_F_NULL(18)
DEF_F_NULL(19)
DEF_F_NULL(20)
DEF_F_NULL(21)
DEF_F_NULL(22)
DEF_F_NULL(23)
DEF_F_NULL(24)
DEF_F_NULL(25)
DEF_F_NULL(26)
DEF_F_NULL(27)
DEF_F_NULL(28)
DEF_F_NULL(29)
DEF_F_NULL(30)
DEF_F_NULL(31)
DEF_F(McPcsX8LanesInterruptNormal, 32, 1)
DEF_F(McMacInterruptNormal, 33, 3)
DEF_F(McHataInterruptNormal, 34, 3)

DEF_D(CtcCsCtlInterruptNormal, 5)
DEF_F_NULL(0)
DEF_F_NULL(1)
DEF_F_NULL(2)
DEF_F_NULL(3)
DEF_F_NULL(4)
DEF_F_NULL(5)
DEF_F_NULL(6)
DEF_F_NULL(7)
DEF_F_NULL(8)
DEF_F_NULL(9)
DEF_F_NULL(10)
DEF_F_NULL(11)
DEF_F_NULL(12)
DEF_F_NULL(13)
DEF_F_NULL(14)
DEF_F_NULL(15)
DEF_F_NULL(16)
DEF_F_NULL(17)
DEF_F_NULL(18)
DEF_F_NULL(19)
DEF_F_NULL(20)
DEF_F_NULL(21)
DEF_F_NULL(22)
DEF_F_NULL(23)
DEF_F_NULL(24)
DEF_F_NULL(25)
DEF_F_NULL(26)
DEF_F_NULL(27)
DEF_F_NULL(28)
DEF_F_NULL(29)
DEF_F_NULL(30)
DEF_F_NULL(31)
DEF_F(McPcsX8LanesInterruptNormal, 32, 0)
DEF_F(McMacInterruptNormal, 33, 2)
DEF_F(McHataInterruptNormal, 34, 2)

DEF_D(CtcHsCtlInterruptNormal, 6)
DEF_F_NULL(0)
DEF_F_NULL(1)
DEF_F_NULL(2)
DEF_F_NULL(3)
DEF_F_NULL(4)
DEF_F_NULL(5)
DEF_F_NULL(6)
DEF_F_NULL(7)
DEF_F_NULL(8)
DEF_F_NULL(9)
DEF_F_NULL(10)
DEF_F_NULL(11)
DEF_F_NULL(12)
DEF_F_NULL(13)
DEF_F_NULL(14)
DEF_F_NULL(15)
DEF_F_NULL(16)
DEF_F_NULL(17)
DEF_F_NULL(18)
DEF_F_NULL(19)
DEF_F_NULL(20)
DEF_F_NULL(21)
DEF_F_NULL(22)
DEF_F_NULL(23)
DEF_F_NULL(24)
DEF_F_NULL(25)
DEF_F_NULL(26)
DEF_F_NULL(27)
DEF_F_NULL(28)
DEF_F_NULL(29)
DEF_F_NULL(30)
DEF_F_NULL(31)
DEF_F_NULL(32)
DEF_F_NULL(33)
DEF_F_NULL(34)
DEF_F_NULL(35)
DEF_F_NULL(36)
DEF_F_NULL(37)
DEF_F_NULL(38)
DEF_F_NULL(39)
DEF_F_NULL(40)
DEF_F_NULL(41)
DEF_F_NULL(42)
DEF_F_NULL(43)
DEF_F_NULL(44)
DEF_F_NULL(45)
DEF_F_NULL(46)
DEF_F_NULL(47)
DEF_F_NULL(48)
DEF_F_NULL(49)
DEF_F_NULL(50)
DEF_F_NULL(51)
DEF_F_NULL(52)
DEF_F_NULL(53)
DEF_F_NULL(54)
DEF_F_NULL(55)
DEF_F_NULL(56)
DEF_F_NULL(57)
DEF_F_NULL(58)
DEF_F_NULL(59)
DEF_F_NULL(60)
DEF_F_NULL(61)
DEF_F_NULL(62)
DEF_F_NULL(63)
DEF_F_NULL(64)
DEF_F_NULL(65)
DEF_F_NULL(66)
DEF_F_NULL(67)
DEF_F(McPcsX16LanesInterruptNormal, 68, 1)
DEF_F(McpuInterruptNormal, 69, 1)
DEF_F(McMacInterruptNormal, 70, 1)
DEF_F(McHataInterruptNormal, 71, 1)

DEF_D(CtcHsCtlInterruptNormal, 7)
DEF_F_NULL(0)
DEF_F_NULL(1)
DEF_F_NULL(2)
DEF_F_NULL(3)
DEF_F_NULL(4)
DEF_F_NULL(5)
DEF_F_NULL(6)
DEF_F_NULL(7)
DEF_F_NULL(8)
DEF_F_NULL(9)
DEF_F_NULL(10)
DEF_F_NULL(11)
DEF_F_NULL(12)
DEF_F_NULL(13)
DEF_F_NULL(14)
DEF_F_NULL(15)
DEF_F_NULL(16)
DEF_F_NULL(17)
DEF_F_NULL(18)
DEF_F_NULL(19)
DEF_F_NULL(20)
DEF_F_NULL(21)
DEF_F_NULL(22)
DEF_F_NULL(23)
DEF_F_NULL(24)
DEF_F_NULL(25)
DEF_F_NULL(26)
DEF_F_NULL(27)
DEF_F_NULL(28)
DEF_F_NULL(29)
DEF_F_NULL(30)
DEF_F_NULL(31)
DEF_F_NULL(32)
DEF_F_NULL(33)
DEF_F_NULL(34)
DEF_F_NULL(35)
DEF_F_NULL(36)
DEF_F_NULL(37)
DEF_F_NULL(38)
DEF_F_NULL(39)
DEF_F_NULL(40)
DEF_F_NULL(41)
DEF_F_NULL(42)
DEF_F_NULL(43)
DEF_F_NULL(44)
DEF_F_NULL(45)
DEF_F_NULL(46)
DEF_F_NULL(47)
DEF_F_NULL(48)
DEF_F_NULL(49)
DEF_F_NULL(50)
DEF_F_NULL(51)
DEF_F_NULL(52)
DEF_F_NULL(53)
DEF_F_NULL(54)
DEF_F_NULL(55)
DEF_F_NULL(56)
DEF_F_NULL(57)
DEF_F_NULL(58)
DEF_F_NULL(59)
DEF_F_NULL(60)
DEF_F_NULL(61)
DEF_F_NULL(62)
DEF_F_NULL(63)
DEF_F_NULL(64)
DEF_F_NULL(65)
DEF_F_NULL(66)
DEF_F_NULL(67)
DEF_F(McPcsX16LanesInterruptNormal, 68, 0)
DEF_F(McpuInterruptNormal, 69, 0)
DEF_F(McMacInterruptNormal, 70, 0)
DEF_F(McHataInterruptNormal, 71, 0)

DEF_D(CtcDpTxCtlInterruptNormal, 8)
DEF_F(NetTxInterruptNormal, 0, 1)
DEF_F(MacSecEncInterruptNormal, 1, 1)
DEF_F(EpeScheduleInterruptNormal, 2, 1)

DEF_D(CtcDpTxCtlInterruptNormal, 9)
DEF_F(NetTxInterruptNormal, 0, 0)
DEF_F(MacSecEncInterruptNormal, 1, 0)
DEF_F(EpeScheduleInterruptNormal, 2, 0)

DEF_D(CtcDpRxCtlInterruptNormal, 10)
DEF_F(NetRxInterruptNormal, 0, 1)
DEF_F(MacSecDecInterruptNormal, 1, 1)

DEF_D(CtcDpRxCtlInterruptNormal, 11)
DEF_F(NetRxInterruptNormal, 0, 0)
DEF_F(MacSecDecInterruptNormal, 1, 0)

DEF_D(CtcQMgrCtlInterruptNormal, 12)
DEF_F(QMgrDeqShpInterruptNormal, 0, 0)
DEF_F(QMgrDeqL4QueInterruptNormal, 1, 0)
DEF_F(QMgrDeqL4GrpInterruptNormal, 2, 0)
DEF_F(QMgrDeqL4CosInterruptNormal, 3, 0)
DEF_F(QMgrDeqL3InterruptNormal, 4, 0)
DEF_F(QMgrDeqL2InterruptNormal, 5, 0)
DEF_F(QMgrDeqL1InterruptNormal, 6, 0)
DEF_F(QMgrDeqL0InterruptNormal, 7, 0)
DEF_F(QMgrDeqChanInterruptNormal, 8, 0)
DEF_F(QMgrQWriteInterruptNormal, 9, 0)
DEF_F(QMgrErmInterruptNormal, 10, 0)

DEF_D(CtcKeyCtlInterruptNormal, 13)
DEF_F(LpmTcamInterruptNormal, 0, 0)
DEF_F(FibEngineInterruptNormal, 1, 0)
DEF_F(FibAccInterruptNormal, 2, 0)
DEF_F(DynamicFibKeyInterruptNormal, 3, 0)
DEF_F(DsAgingInterruptNormal, 4, 0)

DEF_D(CtcIpeTxCtlInterruptNormal, 14)
DEF_F(FlowAccIpeInterruptNormal, 0, 0)
DEF_F(FlowAccEpeInterruptNormal, 1, 0)
DEF_F(FlowAccAdInterruptNormal, 2, 0)
DEF_F(GlobalStatsInterruptNormal, 3, 0)
DEF_F(StormCtlInterruptNormal, 4, 0)
DEF_F(PolicingIpeInterruptNormal, 5, 0)
DEF_F(LinkAggInterruptNormal, 6, 0)
DEF_F(IpfixHashInterruptNormal, 7, 0)
DEF_F(IpeFwdInterruptNormal, 8, 0)
DEF_F(EcmpDlbInterruptNormal, 9, 0)
DEF_F(CoppIpeInterruptNormal, 10, 0)

DEF_D(CtcIpeRxCtlInterruptNormal, 15)
DEF_F(ProgramAclLtidTcamInterruptNormal, 0, 0)
DEF_F(SvcPolicingInterruptNormal, 1, 0)
DEF_F(IpeAclInterruptNormal, 2, 0)
DEF_F(FlexDecodeInterruptNormal, 3, 1)
DEF_F(FlexDecodeInterruptNormal, 4, 0)
DEF_F(UserIdHashInterruptNormal, 5, 0)
DEF_F(FlexDecodeInterruptNormal, 6, 2)
DEF_F(OamHashInterruptNormal, 7, 0)
DEF_F(IpePktProcInterruptNormal, 8, 0)
DEF_F(IpeLkupMgrInterruptNormal, 9, 0)
DEF_F(IpeIntfMapInterruptNormal, 10, 0)
DEF_F(IpeHdrAdjInterruptNormal, 11, 0)
DEF_F(EfdInterruptNormal, 12, 0)

DEF_D(CtcEpeCtlInterruptNormal, 16)
DEF_F(EpePktRewriteInterruptNormal, 0, 0)
DEF_F(EpeHdrEditInterruptNormal, 1, 0)
DEF_F(PolicingEpeInterruptNormal, 2, 0)
DEF_F(EpeAclOamInterruptNormal, 3, 0)
DEF_F(CoppEpeInterruptNormal, 4, 0)
DEF_F(EpeNextHopInterruptNormal, 5, 0)
DEF_F(EpeHdrProcInterruptNormal, 6, 0)
DEF_F(EpeHdrAdjInterruptNormal, 7, 0)

DEF_D(CtcBsrCtlInterruptNormal, 17)
DEF_F(BufStoreProcInterruptNormal, 0, 0)
DEF_F(MetFifoShareInterruptNormal, 1, 0)
DEF_F(MetFifoProcInterruptNormal, 2, 0)
DEF_F(BufStoreDpCtlInterruptNormal, 3, 1)
DEF_F(BufStoreDpCtlInterruptNormal, 4, 0)
DEF_F(BufRetrvDPInterruptNormal, 5, 1)
DEF_F(BufRetrvDPInterruptNormal, 6, 0)

DEF_D(CtcAdEditCtlInterruptNormal, 18)
DEF_F(EgrSclHashInterruptNormal, 0, 0)
DEF_F(DynamicMiscKeyInterruptNormal, 1, 0)
DEF_F(MplsHashInterruptNormal, 2, 0)
DEF_F(DynamicEditInterruptNormal, 3, 0)
DEF_F(DynamicAdInterruptNormal, 4, 0)

DEF_D(CtcMiscCtlInterruptNormal, 19)
DEF_F(TsEngineInterruptNormal, 0, 0)
DEF_F(LedInterruptNormal, 1, 1)
DEF_F(LedInterruptNormal, 2, 0)
DEF_F(spnOamInterruptNormal, 3, 0)
DEF_F(CpuMacProcInterruptNormal, 4, 0)
DEF_F(HMacEngineInterruptNormal, 5, 0)
DEF_F(OobFcInterruptNormal, 6, 0)
DEF_F(OamProcInterruptNormal, 7, 0)
DEF_F(OamFwdInterruptNormal, 8, 0)
DEF_F(OamAutoGenPktInterruptNormal, 9, 0)
DEF_F(McpuInterruptNormal, 10, 6)
DEF_F_NULL(11)
DEF_F_NULL(12)

DEF_D(CtcFlexeShimInterruptNormal, 20)
DEF_F_NULL(0)
DEF_F_NULL(1)
DEF_F(FlexeMgrInterruptNormal, 2, 0)
/* to do */
DEF_F_NULL(3)

DEF_D(CtcFlexeShimInterruptNormal, 21)
DEF_F_NULL(0)
DEF_F_NULL(1)
DEF_F(FlexeMgrInterruptNormal, 2, 1)
/* to do */
DEF_F_NULL(3)

DEF_D(CtcFlexeCrossInterruptNormal, 22)
DEF_F_NULL(0)
DEF_F_NULL(1)
/* to do */
DEF_F_NULL(2)
DEF_F_NULL(3)
DEF_F_NULL(4)
DEF_F(McpuInterruptNormal, 5, 2)
DEF_F_NULL(6)
DEF_F_NULL(7)
DEF_F_NULL(8)

DEF_D(CtcFlexeCrossInterruptNormal, 23)
DEF_F_NULL(0)
DEF_F_NULL(1)
/* to do */
DEF_F_NULL(2)
DEF_F_NULL(3)
DEF_F_NULL(4)
DEF_F(McpuInterruptNormal, 5, 5)
DEF_F_NULL(6)
DEF_F_NULL(7)
DEF_F_NULL(8)

DEF_D(PbCtlLeftInterruptNormal, 24)
DEF_D(PbCtlLeftInterruptNormal, 25)
DEF_D(I2CMasterInterruptNormal0, 26)
DEF_D(I2CMasterInterruptNormal1, 27)
DEF_D(CpuMapInterruptNormal, 28)
DEF_D(EcpuInterruptNormal, 29)
DEF_D(ScpuInterruptNormal, 30)
DEF_D(PcieIntfInterruptNormal, 31)
DEF_D(DmaCtlInterruptNormal, 32)

/*Fatal*/
DEF_DD(SupIntrFatal, 0)
DEF_FF(CtcDpTxCtlInterruptFatal, 0, 1)
DEF_FF(CtcDpTxCtlInterruptFatal, 1, 0)
DEF_FF(CtcDpRxCtlInterruptFatal, 2, 1)
DEF_FF(CtcDpRxCtlInterruptFatal, 3, 0)
DEF_FF(CtcQMgrCtlInterruptFatal, 4, 0)
DEF_FF(CtcKeyCtlInterruptFatal, 5, 0)
DEF_FF(CtcIpeTxCtlInterruptFatal, 6, 0)
DEF_FF(CtcIpeRxCtlInterruptFatal, 7, 0)
DEF_FF(CtcEpeCtlInterruptFatal, 8, 0)
DEF_FF(CtcBsrCtlInterruptFatal, 9, 0)
DEF_FF(CtcAdEditCtlInterruptFatal, 10, 0)
DEF_FF(CtcMiscCtlInterruptFatal, 11, 0)
DEF_FF(PbCtlLeftInterruptFatal, 12, 1)
DEF_FF(PbCtlLeftInterruptFatal, 13, 0)
DEF_FF(CpuMapInterruptFatal, 14, 0)
DEF_FF(PcieIntfInterruptFatal, 15, 0)
DEF_FF(DmaCtlInterruptFatal, 16, 0)
/*Normal*/
DEF_DD(SupIntrNormal, 1)
DEF_FF(CtcCsCtlInterruptNormal, 0, 3)
DEF_FF(CtcCsCtlInterruptNormal, 1, 2)
DEF_FF(CtcHsCtlInterruptNormal, 2, 3)
DEF_FF(CtcHsCtlInterruptNormal, 3, 2)
DEF_FF(CtcCsCtlInterruptNormal, 4, 1)
DEF_FF(CtcCsCtlInterruptNormal, 5, 0)
DEF_FF(CtcHsCtlInterruptNormal, 6, 1)
DEF_FF(CtcHsCtlInterruptNormal, 7, 0)
DEF_FF(CtcDpTxCtlInterruptNormal, 8, 1)
DEF_FF(CtcDpTxCtlInterruptNormal, 9, 0)
DEF_FF(CtcDpRxCtlInterruptNormal, 10, 1)
DEF_FF(CtcDpRxCtlInterruptNormal, 11, 0)
DEF_FF(CtcQMgrCtlInterruptNormal, 12, 0)
DEF_FF(CtcKeyCtlInterruptNormal, 13, 0)
DEF_FF(CtcIpeTxCtlInterruptNormal, 14, 0)
DEF_FF(CtcIpeRxCtlInterruptNormal, 15, 0)
DEF_FF(CtcEpeCtlInterruptNormal, 16, 0)
DEF_FF(CtcBsrCtlInterruptNormal, 17, 0)
DEF_FF(CtcAdEditCtlInterruptNormal, 18, 0)
DEF_FF(CtcMiscCtlInterruptNormal, 19, 0)
DEF_FF(CtcFlexeShimInterruptNormal, 20, 0)
DEF_FF(CtcFlexeShimInterruptNormal, 21, 1)
DEF_FF(CtcFlexeCrossInterruptNormal, 22, 0)
DEF_FF(CtcFlexeCrossInterruptNormal, 23, 1)
DEF_FF(PbCtlLeftInterruptNormal, 24, 0)
DEF_FF(PbCtlLeftInterruptNormal, 25, 1)
DEF_FF(I2CMasterInterruptNormal0, 26, 0)
DEF_FF(I2CMasterInterruptNormal1, 27, 0)
DEF_FF(CpuMapInterruptNormal, 28, 0)
DEF_FF(EcpuInterruptNormal, 29, 0)
DEF_FF(ScpuInterruptNormal, 30, 0)
DEF_FF(PcieIntfInterruptNormal, 31, 0)
DEF_FF(DmaCtlInterruptNormal, 32, 0)

/*Sup*/
DEF_DD(SupIntrGenCtl, 0)
DEF_FF(SupIntrFatal, 0, 0)
DEF_FF(SupIntrNormal, 1, 0)

#endif
